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<head><title>Microchip TCP/IP Stack Demo</title></head>
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<td colspan=2 align=right><a href="http://www.microchip.com/"><img src="mchp.gif" width=230 height=60 alt="" border=0 align=left></a></td>
<td colspan=2 align=right><font color=#156F4F size=6><b>Microchip TCP/IP Stack&nbsp;</b></font></td>
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<td width=25% align=center><b>Architecture</b></td>
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The hardware architecture to run the Microchip TCP/IP Stack	is very simple.	Most Ethernet controllers require few support components including the pulse transformer or RJ45 connector with integrated magnetics. When using the ENC28J60 Ethernet controller communications with the MCU are implemented with the standard SPI interface that can be shared with other devices such as the	serial EEPROM and a character LCD display module.<br><br>
Each MCU provides a variety of clock configurations, including sourcing the	clock signal from the CLKOUT output of the ENC28J60.<br><br>
Some MCUs from the PIC18F family, such as the popular PIC18F452, may not provide enough program memory or RAM to fit the TCP/IP stack code depending on what modules are selected. A highly recommended option is the PIC18F4620 or	the PIC28F2620 if fewer I/O ports are required.<br><br>
The TCP/IP Stack firmware is implemented in a modular fashion using cooperative	multitasking and written in C language.<br><br>
The current version serving these pages is a modified version of the original TCP/IP Stack v3.75 from Microchip.<br><br>
The latest version of the TCP/IP stack is available for download at <a href="http://www.microchip.com/tcpip/">www.microchip.com/tcpip</a> and this modified version and additional documentation at	<a href="http://www.ljcv.net/projects/mchptcp3.75/">www.ljcv.net/projects/mchptcp3.75</a>.<br><br>   
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